Asiczen Releases HBM Verification IP
Asiczen Technologies announces the release of its UVM based HBM verification IP. Based on the JEDEC standard, this VIP supports both HBM host and device. With configurable timing parameters, memory size, number of channels and pseudo mode support, this VIP equips the user with all he needs to verify a HBM host or memory.
High Bandwidth Memory (HBM) is a high-performance RAM interface for 3D-stacked DRAM. It has been adopted by JEDEC as an industry standard in October 2013. HBM achieves higher bandwidth while using less power in a substantially smaller form factor than DDR4. The HBM technology is similar in principle but incompatible with the Hybrid Memory Cube interface.